This invention relates to a system for transmitting data from a first device to a second device where the two devices may operate independently. In particular, a ripple register system is shown which may operate between a first element of a computer and a second element of a computer or between an element of a computer and some peripheral device. Although the ripple register transmission path contains data in the process of transmission, it is not a buffer device as such but may be used as a transmission device between buffers.
A patent known to applicant and forming part of the prior art is U.S. Pat. No. 3,665,424. The present invention constitutes an improvement over the device shown in the patent in that data can be transmitted at each clock period whereas the device shown in the patent requires two internal clock cycles for each stage of data transfer. The patent shows a device which requires a completely empty stage just ahead of a data transmitting stage before data can be moved up. An advantage of the present invention is that with two data registers and two control flip flops in each ripple register device, a half-empty condition is recognized in the ripple register device in which the secondary data rank is empty so that data may be transferred from one device to the next at each clock cycle in recognition of the half-empty state. All of this will be explained in detail below. Other patents known to applicant in the prior art are U.S. Pat. Nos. 3,708,609 and 3,949,384.
Some prior art devices show systems requiring multiple clock inputs of different phases or on internally generated multi-phase clock for efficient data transfer. An advantage of the present invention is that only a single phase external clock signal is required for operation. This is not to limit the scope of the present invention if embodied in alternate forms using more than one clock signal for various reasons, however.